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A HIGH-SPEED CMOS CURRENT COMPARATOR SUITABLE FOR ALGORITHMIC ANALOG-TO-DIGITAL CONVERTERS

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Abstract (2. Language): 
This paper introduces a high-speed high resolution CMOS current comparator which is used in an algorithmic Analog-to-Digital Converter (ADC) and implemented with a 0.6 μm standard CMOS process. Circuit occupies 170 x 80μm2. Proposed circuit performs comparison over a precision of 10- bit at a 100MHz clock within the 0-250 μA input current range. Power consumption is less than 500 μA.
603-605

REFERENCES

References: 

[1] Nairn, D.G., Salama, C.A.T., “Current-
Mode Algorithmic Analog to Digital
Converters,” IEEE Journal of Solid-State
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[2] Yin, G. M., Eynde, F.O., and Sansen, W.,
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bit Resolution,” IEEE Journal of Solid-State
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[3] Soldera, J.D.B. and Oki, N., “A High Speed
3.3V Current Mode CMOS Comparators
with 10-bit Resolution,” IEEE 43rd
Midwest Symp. On Circuits and Systems,
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[4] Kaya, T., and Zeki, A.,. “A Modified Active
Current Mirror Suitable for Current Mode
Algorithmic Analog to Digital Converter,”
9th IEEE International Conference on
Electronics, Circuits and Systems ICECS
2002.

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